Sub-micron sized transistors are very well known and are used extensively in all types of electrical devices. It is also well known that these transistors often include deep source/drains and shallower source/drains, that are located adjacent the gate electrodes of the transistors and between which a channel region is formed during an applied voltage. The shallow source/drains are typically formed by placing dopants into a semiconductor substrate through well-known processes, such an implantation. The shallow source/drains are implanted immediately adjacent the gate electrodes. Typically, after sidewall spacer formation, deep source/drain implants are conducted to complete the implantation of process for the source/drains.
The dopant profile of both the shallow source/drains and the deep source/drains determine channel length and govern the electrical characteristics of the electronics device in which they are incorporated. As such, manufacturers take great care in making certain that the dopant profiles are as close to specification parameters as possible. To that end, implantation, dosages, implantation energies, and subsequent activation processes are carefully calculated and followed to make certain that the dopant profiles are within specified parameters.
The implantation process can amorphize the substrate by breaking up the crystalline structure of the doped substrate due to the energy imparted by the doping atoms. Typically, the depth of the amorphization is about equivalent to the depth to which the dopants are implanted. Subsequent to the implantation of both the shallow source/drains and the deep source/drains, an anneal is conducted to repair the crystalline structure to the depth of the amorphized doped substrate.
However, during the implantation process, some silicon atoms can be displaced to a depth beyond the amorphous layer. As a result, these displaced silicon atoms are not repaired or placed back into the crystal lattice by the anneal and remain as interstitials, recoils, or dislocation loops.